Director of Device Integration Engineering

Director of Device Integration Engineering responsibilities would include (but not limited to):

- Build and lead Device Integration team in FSM HVM Global Yield organization to execute HVM yield roadmap, device targeting and attain performance targets.
- Collaborate with Technology Development team to import new technology to production fabs across the globe.
- Work with Process Integration and Yield Analysis teams to identify root cause of device-related yield/performance issues and propose mitigation plan in defined timeline to meet committed production yield/performance targets.
- Lead NPI (New Product Introduction) in production fab and perform device-related process optimizations to meet foundry customers product specifications and requirements.
- Develop a model to predict device performance accurately in early-to-mid stage of Si progression and drive systematic solution to maintain baseline device performance.
- Drive process simplification to identify and implement cost reduction engineering opportunities. Lead technical interactions with internal and external customers.

**Qualifications**:
Minimum Qualifications:

- Master's in Electrical Engineering, Physics or Materials Science major. Other related science and engineering degrees can be considered based on industry experience.
- 10+ years of experience in advanced node semiconductor industry in Device Integration.
- 5+ years of people leadership experience to manage and direct an organization of 20+ device integration engineers in fast-paced high-volume semiconductor manufacturing environment to drive yield, technology, quality, output and cost.
- Must have solid understanding on Device Physics and experience in FinFET technology development or high-volume manufacturing.
- Strong working knowledge in module processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.
- Experience in serving external Foundry customers through technical interactions.
- Problem-solving and project/program management experience with strong self-initiative and self-learning capabilities.
- Demonstrated interpersonal skills to perform at leadership role including influencing, engaging, and motivating.
- Proven track record of working across organization through matrix structures in order to accomplish strategic objectives with conflicting priorities.
- Must demonstrate strong communication skills.
- Preferred Qualifications:

- Ph.D. in Electrical Engineering, Physics or Materials Science major. Other related science and engineering degrees can be considered based on industry experience.
- Experience in GAA (Gate-All-Around) technology architecture
- Experience in new semiconductor technology development

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

**Inside this Business Group**:
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

**Posting Statement**:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

**Benefits**:
**Working Model**:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
**In certain circumstances the work model may change to accommodate business needs.**

**Position of Trust**
JobType

Hybrid