Doctoral Thesis: Verification of Generic Ips

As all of these options have disadvantages, a new way for verifying generic components shall be developed. Approaches may be, but are notlimited to - Ensuring that every code line impacts the finally built design atleast once. For example code that is not impacted by generics - i.e.impacts any design - can be verified in this way - Generalization of numeric values, e.g. finding a way to guaranteethat a set of address widths works fine if at least one of them isverified - Use of generic testplans -Application driven verification, also including software
We offer: - Realistic, challenging, and impactful problems - The possibility of putting problems into an overall context - Collaboration with colleagues and teams that is seldom found anywherein the world in terms of depth and breadth - A potential 3 months research stays at top universities worldwide and/or Europe wide cooperation of experts as part of funded research activities - An Infineon internal PhD community
The thesis will be written in cooperation with Technical UniversityMunich and under the supervision of Dr. Sebastian Prebeck and Prof. Dr. Wolfgang Ecker.

The tasks within the thesis will consist of:

- M **odelling of formal properties**for generic IPs **with generic functionality and timing**:

- **Property generation**using a Python-based hardware generation framework
- **Generation of generic test plans**and other verification collaterals
- **Coverage metrics for generic models**:

- Methodology validation on industry IPsM (e.g. RISC-V)

This doctoral thesis should also study **existing approaches and prove the applicability**and get feedback to enhance the methodology.

The learnings out of the thesis will be:

- Formal HW/SW co-verification methodologies
- Generic hardware IP architectures and their definition
- Methodology of 'code generation' for formal properties in an industrial environment
- Modeling and Meta-ModelingVarious Modeling and Abstraction concepts and their implementation

**Your Profile**
A **doctoral student is a research enthusiast**,
›who enjoys working in an **industrial environment**in combination with an Infineon partner university.
›who appreciates **open communication**and the contribution of an **international environment**.
- Graduated in **computer engineering, electrical engineering**or are lated field with very good grades
- Are interested in **complex, interdisciplinary and interlinked tasks**and should like to solve them together with colleagues
- Possess **good presentation skills**that help you to present challenging issues clearly and simply
- Are curious and open as well as **interested in learning**and trying out new things
- Are experienced in **metamodeling**, (template-based) **code generationand/or model-driven architecture**:

- Possess knowledge in **object-oriented programming with languages**such as C ++ and Python and embedded programming with C and / or Assembler
- Have good knowledge of **digital design and RTL modeling**in VHDL and /or (System) Verilog and embedded system architectures
- Have **knowledge in embedded programming**with C
- Possess very good **language skills in English and ideally German
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The central R&D organization „ **Design Enabling and Services“ (DES)**provides the design environment to the different Infineon product development teams. With state-of-the-art design methods, building blocks and a wide range of product development services DES supports Infineon's advanced IC development from early high-level system models to verified products ready for manufacturing.

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