DRAM Product

ID: JR45610

• Test Concept definition for robust at speed test coverage.
• Setup and perform measurements using ATE (Automatic Test Equipment).
• Implement scripts to extract manufacturing parametric data and interpret it using appropriate statistical methods.
• Apply analysis results to drive yield enhancement, product cost and device performance using suitable algorithms.
• Define test software architecture and methodologies for testing & debugging next generation graphics chip.
• Provide ideas for new DFT (Design for Testability) and circuit architectures to support enhanced test capability.
• Coordinate activities with Design, Test Engineering, Application Engineering and Quality Department for coverage.

The candidate will interface with design and design verification teams, quality groups, technologists and manufacturing sites in Asia.

The candidate should hold a university master’s degree in electrical engineering or computer science, with excellent grades.

• Good knowledge of software algorithms and architecture
• knowledge of CMOS Circuit design and Electricalfailure analysis
• Analytical and problem solving skills
• Zero Defect Mindset

Desired skills are:

• Good knowledge of Python programming.
• Experience or skills in data analysis, statistical methods and tools.
• Fluent English communication skills.
• basic UNIX commands knowledge.
• 2-4  years of relevant experience , however first-time employees are highly welcome and encouraged to submit a job application.