Aktuelle Jobs im Zusammenhang mit Dft Architect - Hamburg - NXP Semiconductors

  • Technical Lead

    vor 1 Woche


    Hamburg, Deutschland NXP Semiconductors Vollzeit

    **Your tasks**: - Responsible for the technical lead of test engineers of upcoming new Radar Products - Early involvement in new product developments and Innovations - Responsibility for guiding test program development on Advantest 93K/EXA scale platform - Support the implementation of DfX into new products in close cooperation with Test & DfT Architects,...


  • Hamburg, Deutschland ARF Design Pvt Ltd. Vollzeit

    **Current openings;** **Senior Digital Designer & Senior Design Verification - Europe onsite (Germany-Hamburg)** Following is the requirement for **Europe onsite (Germany - Hamburg)**: **Required Experience**: 5+ Years experience **1. Senior Digital Designer (2 positions )**:Immediate joiners are preferred. **Responsibilities** - Contribute to the...

Dft Architect

vor 2 Wochen


Hamburg, Deutschland NXP Semiconductors Vollzeit

The DfT-Architect coordinates across IC architecture, DfT, Design and Test & Product engineering disciplines. He/she is responsible for the DfT Architecture and proper implementation in the design. Overall goal is to aim for an optimal industrial test concept and an appropriate DfT realization according to the required test cost vs. product quality balance within the project determined constraints. His/her focus is on complex RF (radar/radio) SOC projects. The DfT-Architect is the technical lead of the DfT-implementation team and advises analog and digital IP designers and software engineers.

**Your responsibilities**:

- Advises the system/hardware architect on testability provisions in the IC/IP
- architecture to enable high test-coverage and easy test access.
- Responsible for the testability requirements of the IC/IP and its composing
- modules.
- Responsible for test case definition.
- Responsible for identifying test impact of requirement changes
- Specifies chip level test concepts requirements (e.g. integrated test
- modules in digital and analogue IP’s, test access and control blocks, build- in self-test circuitries etc.).
- Defines test strategy and DfT architecture to achieve the specified quality
- level for lowest integral test cost.
- Develops a test architecture which enables fast failure analysis and debug
- capability on IC/IP level.
- Aims for cost effectiveness and maximum reusability of test functionality
- and concepts.
- Supports predictions on factory yields, fall-off rate, delivery quality, test
- coverage, test cycle time and test costs.
- Defines test-circuits and structures in IC/IP, analyzes and verifies the
- testability and test coverage in IC/IP. In larger project he usually guides the
- DfT-implementation team and assists appropriate digital and analog
- designers in charge to implement special DfT circuitry.
- Involved in the test verification and validation process of the product, to
- support this with test tools and to verify the anticipated fault models on
- relevance and completeness for usage in a DfT- and test verification
- context.
- Supports and consults design team members on test related issues, as
- well as coaches test
- and product engineers in the area of Design-for
- Testability.
- Assists other team members to generate fully verified test pattern and test
- methods.
- Aids the test engineering during test program development and debug

More information about NXP in Germany...