AMS Design Verification Specialist

vor 3 Wochen


Munich, Bayern, Deutschland Apple Vollzeit
Job Title: AMS Design Verification Engineer

At Apple, we're looking for a talented AMS Design Verification Engineer to join our team. As a key member of our verification team, you will be responsible for designing and implementing verification environments for multi-layer systems using the SystemVerilog UVM library.

Key Responsibilities:
  • Design and develop verification environments for multi-layer systems
  • Implement performance-based analysis and power-related analysis
  • Deliver test cases for design for test and test engineering teams
  • Perform gate-level verification for power and timing
  • Provide lab bring-up support
Requirements:
  • Knowledge of SystemVerilog test-bench language and UVM
  • Hands-on experience with constrained random verification environments
  • Basic design background for verification results analysis
  • Knowledge of Object-Oriented Programming (OOP)
  • Proficiency in English language
Preferred Qualifications:
  • Master's degree or PhD in Electrical/Computer Engineering or equivalent
  • Hands-on experience with Assertion-Based Verification
  • Familiarity with system design using C++, Python, or Verilog
  • Familiarity with FPGA emulation platforms

Apple is an Equal Opportunity Employer committed to diversity and inclusion. We welcome applicants from diverse backgrounds and perspectives.



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