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Senior Software Engineer for Virtual Prototyping and Verification
vor 1 Monat
We are a leading developer of semiconductors, sensors, and control units for automotive applications. Our Complex Systems-on-Chip (SoC) often contain one or more on-chip processors that run software tasks.
Job DescriptionVirtual Prototypes can be used for efficient pre- and post-silicon software development enabling earlier and more flexible verification as well as software development.
- During this master thesis you will focus on achieving a flexible and configurable verification approach to speed-up verification of digital design representation at different levels of abstraction and to construct a scheme to classify the test cases within the scope.
- Quantitative and qualitative metrics will be used to demonstrate the effectiveness of the implemented verification approach.
- You will learn modern approaches to efficiently develop and integrate virtual prototypes.
- Furthermore, you will also get familiar with cross-verification of SoC designs in unified verification methodology.
To succeed in this role, you should have:
- Master studies in the field of Computer Science, Electrical Engineering, Electronics Engineering or comparable
- Experience and Knowledge: in object-oriented programming, digital hardware; knowledge of processor architectures, C++, SystemVerilog and UVM
- Personality and Working Practice: you excel at generating new ideas, asking questions, and actively collaborating with the team to efficiently achieve shared goals
- Languages: very good in written and spoken English
We offer:
- A competitive salary of approximately €2,200 per month based on 6 months duration
- The opportunity to work on innovative projects and contribute to the development of cutting-edge technologies
- A dynamic and collaborative work environment with a diverse team of experts