Space Mechanisms Algorithms Internship
vor 4 Wochen
Airbus Defence and Space is seeking a highly motivated individual to fill the role of Intern in Engineering for Space Mechanisms Algorithms - VHDL Development into a Standardized, Space-Qualified IP Core.
This internship offers a unique chance to gain hands-on experience in the development of space mechanisms algorithms and contribute to the creation of innovative technologies.
Key Responsibilities:
- Analysis and understanding of existing development
- Learning and understanding formal development requirements from ESA standard
- Definition of external interfaces of module interfaces together with Airbus engineers
- Formalization of requirements into a VHDL IP-Core specification
- Checking existing VHDL code against coding standards
- Delta-development of module with respect to defined interfaces and coding standards
- Definition and development of test-benches and test-cases
- Anonymization of developed IP-Core
- Verification and validation of IP-Core
- Documentation of development and IP-Core according to ESA standard in English language
- Enrolled full-time student in the area of Electrical Engineering, Telecommunication Engineering, Space Engineering or an equivalent field of study
- Good basic knowledge in VHDL and FPGA development
- Structured way of working
- Excellent communication skills and ability to work independently
- Solid capabilities and interest in documentation of work
- Languages: English is mandatory; French or German would be an asset
Please upload the following documents: cover letter, CV, relevant transcripts, enrollment certificate.
Airbus Defence and Space is committed to fostering a diverse and inclusive work environment and encourages applications from talented individuals from all backgrounds.
Company: Airbus Defence and Space GmbH
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